Semiconductor Electronics: Materials, Devices And Simple Circuits

In an n-type silicon holes are minority carriers and pentavalent

atoms are the dopants as it is formed by doping of a pentavalent atom in a tetravalent crystal.

Pentavalent atoms have an excess electron than a tetravalent atom, hence a number of holes are less than the number of electrons. So, holes are the minority carriers.

In a p-type semiconductor holes are majority carriers and trivalent atoms are dopants as it is formed by doping of a trivalent atom in a tetravalent crystal.

Trivalent atoms have an electron less than a tetravalent atom, hence a number of holes are greater than the number of electrons (As Absence of electron represents hole).So, holes are the majority carriers.

For an insulator, the band gap energy is always higher, (E_g≈ 6ev). And in case of silicon and germanium, silicon has higher energy gap than germanium. (This is experimental data.)

In an unbiased p-n junction diode, the holes diffuse from the p-region to the n-region because of the difference in their concentration in the regions. Holes concentration is more in p-region, hence to achieve equilibrium they diffuse towards less concentrated n-region.

When a forward bias voltage is applied, The N-region is attached to the negative terminal of the battery and the P-region is connected to the positive terminal of the battery. Negative-negative and positive-positive repulsion occur on both sides, so it opposes the junction barrier voltage, hence the barrier voltage is reduced/lowered. The diagram of a diode in forward bias is shown as below:

The base region is made very thin and lightly doped, as it’s the main function is to control the flow of electron through the transistor. It’s lightly doped hence less number of majority carriers will be there resulting in a lesser percentage of emitter current flow through the base than the collector. That’s why base current is negligibly small.

Also, emitter junction is always forward biased and collector junction is reverse biased. This setup results in the transistor being in the active region. Otherwise, no current flows through the transistor. (Cut-off or saturation region)

Hence, both B) and C) are correct.

The gain is maximum and constant in mid frequency ranges and is low at both high and low-frequency ranges. The figure gives the Distribution of a transistor-amplifier gain over a frequency range.

During a cycle, half wave rectifier conducts once and full wave rectifier conducts twice, hence the output frequency for the half-wave rectifier will be same i.e. 50 Hz, whereas the output frequency for the full wave rectifier will be double, i.e. 100 Hz.

Output frequency for full wave rectifier = 100Hz, for half-wave rectifier it’s 50 Hz.

(Actually, this is application of p-n junction diode)

Given that,

R_c = 2K-Ω = 2000 Ω (Collector Resistance)

V = 2 Volts (Audio signal voltage across the collector resistance)

β = 100 (Current amplification factor of the transistor)

R_B = 1K-Ω (Base resistance)

Let, the Input signal voltage be V_i

Base current = I_B

We have the relation for voltage amplification as:

⇒

⇒

⇒V_i = 0.01 V

Therefore, the input signal voltage of the amplifier is 0.01 V.

We know that Base Resistance:

R_B = V_i/I_B

⇒ I_B = V_i/R_B = 0.01 V/1000Ω = 10μA

Therefore, the base current of the amplifier is 10μA

Let A₁ = 10 (Voltage gain of the first amplifier)

and A₂ = 20 (Voltage gain of the second amplifier)

V_i = 0.01 V (Input signal voltage)

Let, Output AC signal voltage = V_o

We have the relation:

V₀ = A × V_i

_{Output after the first stage VO1} = A₁ × V_i

_{Then, output after the 2}^nd stage V_O2 = V_O1 × A₂ = V_i × A₁ × A₂

_{Hence, the final output = VO} = 20 × 10 × 0.01 = 2 Volts

Therefore, the output AC signal of the given amplifier is 2 V.

Given that the Energy band gap of photodiode, E_g = 2.8 eV

Wavelength, λ = 6000 nm = 6000 × 10^–9 m

The energy of a signal is given by the relation:

…. (I)

Where,

h = Planck’s constant = 6.626 × 10^–34J-s

c = Speed of light = 3 × 10⁸m/s

So, E = 3.3 × 10^–20 J [From equation (I)]

We know that, 1.6 × 10^–19J = 1 eV

Therefore,

∴ E = 0.21 eV

The energy of any particular signal of wavelength 6000 nm is 0.21 eV, which is less than given 2.8 eV − the energy band gap of the photodiode. So, the photodiode cannot detect the signal.

(Actually, this is example of application of photodiode)

Given,

Number of Silicon atoms per m³ = 5 × 10²⁸

Number of Arsenic atoms per m³ (n_As) = 5 × 10²²

Number of Indium atoms per m³ (n_In) = 5 × 10²⁰

Intrinsic charge carrier concentration (n_i) = 1.5 × 10¹⁶ m^-3

So, number of electrons per m^-3 (n_e) = n_As – n_i

i.e., n_e = 5 × 10²² – 1.5 × 10¹⁶ = 4.99 × 10²² m^-3

If n_h is the number of holes per m^-3, then according to Mass-action law,

n_i² = n_en_h

So, n_h = n_i²/n_e

i.e., n_h =

So, n_h= 4.5 × 10⁹ m^-3

The number of electrons is higher than the number of holes. So, the given material is n-type.

NOTE: Arsenic is pentavalent and Indium is trivalent. In an n-type semiconductor, electrons are the majority charge carriers i.e., n_e≫n_h. In a p-type semiconductor, holes are the majority charge carriers i.e., n_h≫n_e.

Given,

Energy gap (E_g) = 1.2eV

The temperature dependence of intrinsic carrier concentration is given as

Where T is the temperature

E_g is the forbidden energy gap

K_B is the Boltzmann’s constant (8.62 × 10^-5 eV/K)

n_o is a constant.

At temperature T₁ = 600K,

……….(1)

At temperature T₂ = 300K,

…..(2)

Dividing eqn. (1) by eqn. (2), we get

⇒

⇒

⇒

⇒

So,

Hence, the ratio of conductivity at 600K to that at 300K is 1.09 × 10⁵.

NOTE: 1. E_g is the forbidden energy gap which is the energy gap between the valence band and conduction bands.

2. Intrinsic semiconductors are pure semiconductors with fewer conductivities. Trivalent and pentavalent impurities are added to intrinsic semiconductors to form p-type and n-type semiconductors respectively. This process is called doping.

Given,

Reverse saturation current (I_o) = 5 × 10^-12 A

Temperature (T) = 300K

The diode current (I) is given by the relation,

Where I_o is the reverse saturation current

V is the voltage across the diode

k_B is the Boltzmann’s constant

T is the absolute temperature

e is the electronic charge (1.6 × 10^-19 C)

Note: The value of k_B (in electron volts) is 8.6 × 10^–5 eV/K and also 1.38 × 10^-23 kg m²s^-2K^-1)

(a) For V = 0.6V,

⇒

⇒

So, I = 5.42 × 10^-7 A

(b) For V = 0.7V,

⇒

⇒

So, I = 3.74 × 10^-6 A

Hence, increase in current = 3.74 × 10^-6 - 5.42 × 10^-7 = 3.198 × 10^-6 A

(c)

So, dynamic resistance =

i.e., Dynamic resistance = 31269.5 Ω = 31.26kΩ

(d) If the reverse bias voltage changes from 1V to 2V, then the diode current remains equal to reverse saturation current. So, dynamic resistance will be infinite.

NOTE: A diode is said to be in forward bias if the p-side and n-side are connected to the positive and negative terminals of the battery respectively. Electric current flowing through the diode in this condition is known as forward diode current. If the p-side is connected to the negative terminal and n-side is connected to the positive terminal of the battery, then the diode is said to be in reverse bias.

The circuit (a) is as follows:

STEPS:

1. The output of the NOR gate is the complement of A + B i.e., (A + B)’.

2. The NOT gate gives the complement of this output.

3. So, the output Y = A + B.

The truth table for this circuit is as follows:

The circuit (b) is as follows:

STEPS:

1. The NOT gates give the complements of the inputs A and B i.e., A’ and B’.

2. The NOR gate gives the output as (A’ + B’)’.

3. Using De Morgan’s law, (A’ + B’)’ = ((A∙B)’)’ = A∙B

4. So, the output Y = A∙B.

The output is obtained as (A∙A)’ = A’. (Since, A∙A = A)

Hence, the given gate acts as a NOT gate.

The truth table is given as follows:

NOTE: NAND gate is a universal gate because it can be used to implement any Boolean function without using any other gates.

The circuit (a) is as follows:

The first NAND gate gives the output (A∙B)’. The second NAND gate gives the output ((A∙B)’∙(A∙B)’)’.

Using De Morgan’s law,

((A∙B)’∙(A∙B)’)’ = ((A∙B)’)’ + ((A∙B)’)’ = (A∙B) + (A∙B) = A∙B (Since, A + A = A)

So, the output is Y = A∙B. The circuit acts as an AND gate.

The truth table for the circuit is as follows:

The circuit (b) is as follows:

The first NAND gate gives (A∙A)’ = A’ as the output. The second NAND gate gives (B∙B)’ = B’ as the output. The last NAND gate gives (A’∙B’)’ as the output.

Using De Morgan’s law,

(A’∙B’)’ = (A’)’ + (B’)’ = A + B

So, the output is A + B. The circuit acts as an OR gate.

The truth table for the circuit is as follows:

NOTE: NAND gate is a universal gate because it can be used to implement any Boolean function without using any other gates.

The given circuit is as follows:

The first NOR gate gives the output (A + B)’. The second NOR gate gives the output ((A + B)’ + (A + B)’)’.

Using De Morgan’s law,

((A + B)’ + (A + B)’)’ = ((A + B)’)’∙((A + B)’)’ = (A + B)∙(A + B) = A + B (Since, A∙A = A)

So, the output is Y = A + B and the circuit acts as an OR gate.

The truth table for the given circuit is as follows:

NOTE: NOR gate is a universal gate because it can be used to implement any Boolean function without using any other gates.

The circuit (a) is as follows:

The circuit gives the output (A + A)’ = A’.

So, the output is Y = A’ and the circuit acts as a NOT gate.

The truth table for the circuit is as follows:

The circuit (b) is as follows:

Similar to the circuit (a), the first two gates give inverted output as A’ and B’. The third NOR gate gives the output (A’ + B’)’.

Using De Morgan’s law,

(A’ + B’)’ = (A’)’∙(B’)’ = A∙B (Since, (A’)’ = A)

Hence, the output is Y = A∙B and the circuit acts as an AND gate.

The truth table is as follows:

NOTE: NOR gate is a universal gate because it can be used to implement any Boolean function without using any other gates.